+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link—65 MHzThe DS90CF384A receiver converts the four LVDs data streams (Up to 1.8 Gbps throughput or 227 Megabytes/sec bandwidth) back
into parallel 28 bits of CMOS/TTL data (24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL). Also available is the DS90CF364A
that converts the three LVDs data streams (Up to 1.3 Gbps throughput or 170 Megabytes/sec bandwidth) back into parallel 21
bits of CMOS/TTL data (18 bits of RGB and 3 bits of Hsync, Vsync and DE). Both Receivers' outputs are Falling edge strobe.
A Rising edge or Falling edge strobe transmitter (DS90C383A/DS90C363A) will interoperate with a Falling edge strobe Receiver
without any translation Logic
The DS90CF384A / DS90CF364A devices are enhanced over prior generation receivers and provided a wider data valid time on the receiver output. The DS90CF384A is also offered in a 64 ball, 0.8mm fine pitch ball grid array (FBGA) package which provides a 44 % reduction in PCB footprint compared to the 56L TSSOP package. This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL Interfaces By National Semiconductor Corporation |
Part | Manufacturer | Description | Datasheet | Samples | |
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DS90CF384AQMT/NOPB | Texas Instruments | +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65MHz 56-TSSOP -40 to 85 | |||
DS90CF384AMTDX/NOPB | Texas Instruments | +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65MHz 56-TSSOP -10 to 70 | |||
DS90CF384AMTD/NOPB | Texas Instruments | +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65MHz 56-TSSOP -10 to 70 | |||
DS90CF384AQMTX/NOPB | Texas Instruments | +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65MHz 56-TSSOP -40 to 85 |
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DS90CF384A Pb-Free | DS90CF384A Cross Reference | DS90CF384A Schematic | DS90CF384A Distributor |
DS90CF384A Application Notes | DS90CF384A RoHS | DS90CF384A Circuits | DS90CF384A footprint |