+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-85 MHzThe DS90CF386 receiver converts the four LVDs data streams (Up to 2.38 Gbps throughput or 297.5 Megabytes/sec bandwidth) back into parallel 28 bits of CMOS/TTL data (24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL). Also available is the DS90CF366 that converts the three LVDs data streams (Up to 1.78 Gbps throughput or 223 Megabytes/sec bandwidth) back into parallel 21 bits of CMOS/TTL data (18 bits of RGB and 3 bits of Hsync, Vsync and DE). Both Receivers' outputs are Falling edge strobe. A Rising edge or Falling edge strobe transmitter (DS90C385/DS90C365) will interoperate with a Falling edge strobe Receiver without any translation Logic
The DS90CF386 is also offered in a 64 ball, 0.8mm fine pitch ball grid array (FBGA) package which provides a 44 % reduction in PCB footprint compared to the 56L TSSOP package. This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL Interfaces By National Semiconductor Corporation |
Part | Manufacturer | Description | Datasheet | Samples | |
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DS90CF386SLC/NOPB | Texas Instruments | +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 85 MHz 64-NFBGA -10 to 70 | |||
DS90CF386MTD/NOPB | Texas Instruments | +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 85 MHz 56-TSSOP -10 to 70 | |||
DS90CF386SLCX/NOPB | Texas Instruments | +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 85 MHz 64-NFBGA -10 to 70 | |||
DS90CF386MTD | Texas Instruments | +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 85 MHz 56-TSSOP -10 to 70 | |||
DS90CF386MTDX/NOPB | Texas Instruments | +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 85 MHz 56-TSSOP -10 to 70 |
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DS90CF386 Pb-Free | DS90CF386 Cross Reference | DS90CF386 Schematic | DS90CF386 Distributor |
DS90CF386 Application Notes | DS90CF386 RoHS | DS90CF386 Circuits | DS90CF386 footprint |