The \'46A, \'47A, and \'LS47 feature active-low outputs designed for driving, common-anode LEDs or incandescent indicators directly. The \'48, \'LS48, and \'LS49 feature active-high outputs for driving lamp buffers or common-cathode LEDs. All of the circuits ...
The \'246 and \'247 are electrically and functionally identical to the SN5446A/SN7446A, and SN5447A/SN7447A respectively, and have the same pin assignments as their equivalents. The \'LS247 and \'LS248 are electrically and functionally identical to the ...
The \'46A, \'47A, and \'LS47 feature active-low outputs designed for driving, common-anode LEDs or incandescent indicators directly. The \'48, \'LS48, and \'LS49 feature active-high outputs for driving lamp buffers or common-cathode LEDs. All of the circuits ...
This 1-of-2 decoder/demultiplexer is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUC1G19 is a 1-of-2 decoder/demultiplexer. This device buffers the data on input A and passes it to the outputs ...
The 74AC11138 circuit is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. ...
The 74ACT11139 is designed for use in high-performance memory-decoding or data-routing applications that require very short propagation delay times. In high-performance memory systems, this decoder is used to minimize the effects of system decoding. The ...
CD4055B and CD4056B types are single-digit BCD-to-7-segment decoder/driver circuits that provide level-shifting functions on the chip. This feature permits the BCD input-signal swings (VDD to VSS) to be the same as or different from the 7-segment ...
CD4543B is a BCD-to-seven segment latch/decoder/driver designed primarily for liquid-crystal display (LCD) applications. It is also capable of driving light emitting diode (LED), incandescent, gas-discharge, and fluorescent displays. This device is ...
The ?AC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system ...
The CD74AC139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 1.5-V to 5.5-V VCC operation. These devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay ...
The CD74AC238 decoder/demultiplexer is designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system ...
The CD74ACT138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, these decoders can be used to minimize the effects of ...
The CD74ACT139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 4.5-V to 5.5-V VCC operation. These devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay ...
The CD74ACT238 decoder/demultiplexer is designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system ...
The CD74HC137, CD74HCT137, ?HC237, and CD74HCT237 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds ...
The ?HC138, ?HC238, ?HCT138, and ?HCT238 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds ...
The CD74HC138 is a high-speed silicon-gate CMOS decoder well suited to memory address decoding or data routing applications. This circuit features low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low-power Schottky TTL ...
The CD74HC139 and ?HCT139 devices contain two independent binary to one of four decoders each with a single active low enable input (1E or 2E). Data on the select inputs (1A0 and 1A1 or 2A0 and 2A1) cause one of the four normally high outputs to go low.
The CD74HC154 and ?HCT154 are 4-to-16 line decoders/demultiplexers with two enable inputs, E1 and E2. A High on either enable input forces the output into the High state. The demultiplexing function is performed by using the four input lines, A0 to A3, to ...
The CD74HC137, CD74HCT137, ?HC237, and CD74HCT237 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds ...
The CD74HC238 , ?HC238, ?HCT138, and ?HCT238 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds ...
The ?HC42 and CD74HCT42 BCD-to-Decimal Decoders utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL decoders with the low power consumption of standard CMOS integrated circuits. These devices have the capability of driving 10 ...
The CD54HC4511, CD74HC4511, and CD74HCT4511 are BCD-to-7 segment latch/decoder/drivers with four address inputs (D0?D3), an active-low blanking (BL) input, lamp-test (LT) input, and a latch-enable (LE) input that, when high, enables the latches to store the ...
The CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4-to-16 line decoder. The selected output is enabled by a low on the enable input (E). A high on E inhibits selection of any output. ...
The CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4-to-16 line decoder. The selected output is enabled by a low on the enable input (E). A high on E inhibits selection of any output. ...
The CD74HC4543 high-speed silicon-gate device is a BCD to 7-segment latch/decoder/driver designed primarily for directly driving liquid-crystal displays. It has an active-high disable input (LD), an active-high blanking input (BI) and a phase input (PH) to ...
The CD74HC137, CD74HCT137, ?HC237, and CD74HCT237 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds ...
The CD74HCT138 , ?HC238, ?HCT138, and ?HCT238 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds ...
The CD74HCT139 and ?HCT139 devices contain two independent binary to one of four decoders each with a single active low enable input (1E or 2E). Data on the select inputs (1A0 and 1A1 or 2A0 and 2A1) cause one of the four normally high outputs to go low.
The CD74HCT154 and ?HCT154 are 4-to-16 line decoders/demultiplexers with two enable inputs, E1 and E2. A High on either enable input forces the output into the High state. The demultiplexing function is performed by using the four input lines, A0 to A3, to ...
The CD74HC137, CD74HCT137, ?HC237, and CD74HCT237 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds ...
The CD74HCT238 , ?HC238, ?HCT138, and ?HCT238 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds ...
The CD74HCT42 and CD74HCT42 BCD-to-Decimal Decoders utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL decoders with the low power consumption of standard CMOS integrated circuits. These devices have the capability of driving 10 ...
The CD54HC4511, CD74HC4511, and CD74HCT4511 are BCD-to-7 segment latch/decoder/drivers with four address inputs (D0?D3), an active-low blanking (BL) input, lamp-test (LT) input, and a latch-enable (LE) input that, when high, enables the latches to store the ...
The CD74HCT4514 and CD74HCT4515 are high-speed silicon-gate devices consisting of a 4-bit strobed latch and a 4-line to 16-line decoder. The selected output is enabled by a low on the enable (E) input. A high on E inhibits selection of any output. ...
The CD74HCT4514 and CD74HCT4515 are high-speed silicon-gate devices consisting of a 4-bit strobed latch and a 4-line to 16-line decoder. The selected output is enabled by a low on the enable (E) input. A high on E inhibits selection of any output. ...
The CD74HCT4543 high-speed silicon-gate is a BCD-to-7 segment latch/decoder/driver designed primarily for directly driving liquid-crystal displays. While the latch enable (LD) is low, the latches are enabled to store the BCD inputs. When the latch enable is ...
The FCT138T devices are 1-of-8 decoders. These devices accept three binary weighted inputs (A0, A1, A2) and, when enabled, provide eight mutually exclusive active-low outputs (OO). The FCT138T devices feature three enable inputs: two active low (E, E) and ...
These monolithic BCD-to-decimal decoder/drivers consist of eight inverters and ten four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid BCD input logic ensures that ...
These monolithic BCD-to-decimal decoders/drivers consist of eight inverters and ten four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid BCD input logic ensures that ...
The SN74AHC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, these decoders can be used to minimize the effects of ...
The SN74AHC139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation. These devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay ...
The SN74AHCT138 3-line to 8-line decoders/demultiplexers are designed to be used in high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, this decoder can be used to ...
The SN74AHCT138Q 3-line to 8-line decoder/demultiplexer is designed to be used in high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, this decoder can be used to ...
The SN74AHCT139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 4.5-V to 5.5-V VCC operation. These devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay ...
The SN54ALS137A, SN74ALS137A, and SN74AS137 are 3-line to 8-line decoders/demultiplexers with latches on the three address inputs. When the latch-enable () input is low, the devices act as decoders/demultiplexers. When goes from low to high, the address ...
The SN74ALS138A and ?AS138 are 3-line to 8-line decoders/demultiplexers designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance systems, these devices can be used to minimize ...
The SN74ALS139 are dual 2-line to 4-line decoders/demultiplexers designed for use in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these devices can minimize the ...
One of the main applications of the SN74ALS156 is as a dual 1-line to 4-line decoder/demultiplexer with individual strobes (G) and common binary-address inputs in a single 16-pin package. When both sections are enabled, the common binary-address inputs ...
The SN74AS138 and ?AS138 are 3-line to 8-line decoders/demultiplexers designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance systems, these devices can be used to minimize ...
The SN74BCT2414 is a decoder specially designed to be used in memory systems with battery backup during power failure. The two independent 2-line to 4-line decoders with separate and common control inputs may be externally cascaded to implement a 3-line to ...
The ?F138 is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When ...
The SN74HC138 devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system ...
The SN74HC138 is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When ...
The SN74HC139 devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can minimize the effects of system decoding. When employed ...
The SN74HC139 device is designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder can minimize the effects of system decoding. When employed with ...
These decimal decoders SN74HC42 consist of eight inverters and ten 4-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid input logic ensures that all inputs remain off ...
The SN74HCT138 devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can minimize the effects of system decoding. When employed ...
The SN74HCT139 devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can minimize the effects of system decoding. When employed ...
These Schottky-clamped TTL MSI circuits SN74LS138 are designed to be used in high-performance memory decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize ...
These Schottky-clamped TTL MSI circuits are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the ...
These monolithic BCD-to-decimal decoder/drivers SN74LS145 consist of eight inverters and ten four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid BCD input logic ...
These monolithic transistor-transistor-logic (TTL) circuits SN74LS155A feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package. When both sections are enabled by the strobes, the common ...
These monolithic transistor-transistor-logic (TTL) circuits SN74LS156 feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package. When both sections are enabled by the strobes, the common ...
These monolithic BCD-to-decimal decoders SN74LS42 consist of eight inverters and ten four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid input logic ensures that ...
The SN74LV138A devices are 3-line to 8-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation.
These devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In ...
The SN74LV139A devices are dual 2-line to 4-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation. These devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. ...
This 3-line to 8-line decoder/demultiplexer with latches SN74LVC137A on three address inputs is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC137A is designed for high-performance memory-decoding or data-routing applications requiring very short ...
The SN54LVC138A 3-line to 8-line decoder/demultiplexer is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC138A 3-line to 8-line decoder/demultiplexer is designed for 1.65-V to 3.6-V VCC operation.
The \'LVC138A devices are designed for ...
The SN74LVC138A 3-line to 8-line decoder/demultiplexer is designed for 2.7-V to 3.6-V VCC operation. The device is designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance ...
This dual 2-line to 4-line decoder/demultiplexer SN74LVC139A is designed for 1.65-V to 3.6-V VCC operation. The device comprises two individual 2-line to 4-line decoders in a single package. The active-low enable (G) input can be used as a data line in ...
This dual 2-line to 4-line decoder/demultiplexer SN74LVC139A-Q1 is designed for 1.65-V to 3.6-V VCC operation. The device comprises two individual 2-line to 4-line decoders in a single package. The active-low enable (G) input can be used as a data line in ...
These Schottky-clamped TTL MSI circuits SN74S138A are designed to be used in high-performance memory decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize ...
These Schottky-clamped TTL MSI circuits SN74S139A are designed to be used
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in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to ...
The CD40147B CMOS encoder features priority encoding of the inputs to ensure that only the highest-order data line is encoded. Ten data input lines (0-9) are encoded to four-line (8, 4, 2, 1) BCD. The highest priority line is line 9. All four output lines are ...
The CD74HC147 and CD74HCT147 are high speed silicon-gate CMOS devices and are pin-compatible with low power Schottky TTL (LSTTL). The ?HC147 and CD74HCT147 9-input priority encoders accept data from nine active LOW inputs (l1 to l9) and provide binary ...
The CD74HCT147 and CD74HCT147 are high speed silicon-gate CMOS devices and are pin-compatible with low power Schottky TTL (LSTTL). The ?HC147 and CD74HCT147 9-input priority encoders accept data from nine active LOW inputs (l1 to l9) and provide binary ...
The SN74HC148 devices feature priority decoding of the inputs to ensure that only the highest-order data line is encoded. These devices encode eight data lines to 3-line (4-2-1) binary (octal). Cascading circuitry (enable input EI and enable output EO) has ...
These TTL encoders feature priority decoding SN74LS148 of the inputs to ensure that only the highest-order data line is encoded. The \'147 and \'LS147 encode nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero condition requires no input ...
These TTL encoders SN74LS348 feature priority decoding of the inputs to ensure that only the highest-order data line is encoded. The \'LS348 circuits encode eight data lines to three-line (4-2-1) binary (octal). Cascading circuitry (enable input EI and enable ...
The 54AC139 is a high-speed, dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually-exclusive active-LOW outputs. Each decoder has an active-LOW Enable input which can be used as a data ...
The 54ACT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three \'AC/\'ACT138 devices ...
The 54F138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three 54F138 devices or a ...
The 54F139 is a high-speed, dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW outputs. Each decoder has an active LOW Enable input which can be used as a ...
The 74HC138 is identical in pinout to the LS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC138 decodes a three-bit Address to one-of-eight active-low outputs. This device ...
The ADG3248 is a 2.5 V or 3.3 V, high performance 2:1 multiplexer/demultiplexer. It is designed on a low voltage CMOS process, which provides low power dissipation yet gives high switching speed and very low on resistance. The low on resistance allows the ...
The ADG3249 is a 2.5 V or 3.3 V, high performance 2:1 multiplexer/demultiplexer bus switch. It is designed on a low voltage
CMOS process, which provides low power dissipation yet gives high switching speed and very low on resistance. This allows the input to ...
The NC7SZ19 is a 1-of-2 decoder NC7SZ19 with a common output enable. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a broad VCC operating range. The ...
The 74AC138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three AC/ACT138 devices or ...
The AC/ACT253 is a dual 4-input multiplexer with 3-STATE outputs. It can select two bits of data from four sources using common select inputs. The outputs may be individually switched to a high impedance state with a HIGH on the respective Output Enable (OE#) ...
The LCX138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three LCX138 devices or a 1-of-32 ...
The VHC138 is an advanced high speed CMOS 3-to-8 decoder/demultiplexer 74VHC138 fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power ...
The AC/ACT138 is a high-speed 1-of-8 decoder/demultiplexer 74ACT138 . This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three AC/ACT138 ...
The MM74HC138 decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications. The circuit features high noise immunity and low power consumption usually associated with CMOS circuitry, yet has ...
The MM74HC154 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses high noise immunity, and low power consumption of CMOS with speeds similar to low power Schottky TTL ...
The AC/ACT139 is a high-speed, dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually-exclusive active-LOW outputs. Each decoder has an active-LOW Enable input which can be used as a ...
The NC7SV19 is a 1-of-2 decoder/demultiplexer from Fairchild\'s Ultra Low Power-A (ULP-A) Series of TinyLogic. ULP-A is ideal for applications that require extreme high speed, high drive and low power. This product is designed for a wide low voltage operating ...
