Programmable Logic Device Family

Mercury devices integrate high-speed differential transceivers and support for CDR with a speed-optimized PLD architecture EP1M120 EP1M350 . These transceivers are implemented through the dedicated serializer, deserializer, and Clock recovery circuitry in the HSDI and incorporate support for the LVDs LVPECL, and 3.3-V PCML I/O standards. This circuitry, together with enhanced I/O elements (IOEs) and support for numerous I/O standards, allows Mercury devices to meet high-speed Interface requirements. By Altera Corporation
EP1M120 's PackagesEP1M120 's pdf datasheet
EP1M120F484C5
EP1M120F484C5N
EP1M120F484C6
EP1M120F484C6N
EP1M120F484C7
EP1M120F484C7N
EP1M120F484I6
EP1M120F484I6N
EP1M350F780C5
EP1M350F780C6
EP1M350F780C7
EP1M350F780I6
EP1M350F780I6N




EP1M120 Pinout will be updated soon..., now you can download the pdf datasheet to check the pinouts !
EP1M120 circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

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EP1M120 Application Notes EP1M120 RoHS EP1M120 Circuits EP1M120 footprint
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