1.5A LDO, DDR Bus Termination Regulator

The FAN1654 is a low-cost bi-directional LDO specifically designed for terminating DDR memory bus. It CAN both sink and source up to 1A continuous, 1.5A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = (VDDQ/2) 40mV. The FAN1654 includes a buffered reference voltage capable of supplying up to 5mA current. On-chip thermal limiting provides protection against a combination of power overload and ambient temperature that would create an excessive junction temperature. A shutdown input puts the FAN1654 into a low power mode for laptop computer applications. The FAN1654 Regulator is available in a power-enhanced eTSSOP-16 package, and the standard SOIC-14 By Fairchild Semiconductor
FAN1654 's PackagesFAN1654 's pdf datasheet
FAN1654MTF TSSOP
FAN1654MTFX TSSOP
FAN1654M SOIC
FAN1654MX SOIC




FAN1654 Pinout, Pinouts
FAN1654 pinout,Pin out
This is one package pinout of FAN1654,If you need more pinouts please download FAN1654's pdf datasheet.

FAN1654 Application circuits
FAN1654 circuits
This is one application circuit of FAN1654,If you need more circuits,please download FAN1654's pdf datasheet.


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