Low Voltage 28-Bit Flat Panel Display Link Serializers

The FIN3385 and FIN3383 transform 28 bit wide parallel LVTTL (Low Voltage TTL) data into 4 serial LVDs (Low Voltage Differential Signaling) data streams. A phase-locked transmit Clock is transmitted in parallel with the data stream over a separate LVDs link. Every cycle of transmit Clock 28 bits of input LVTTL data are sampled and transmitted.
The FIN3386 and FIN3384 receive and convert the 4/3 serial LVDs data streams back into 28/21 bits of LVTTL data. Refer to Table 1 for a matrix summary of the Serializers and Deserializers available. For the FIN3385 at a transmit Clock frequency of 85MHz, 28 bits of LVTTL data are transmitted at a rate of 595Mbps per LVDs channel.
These chipsets are an ideal solution to solve EMI and cable size problems associated with wide and high-speed TTL Interfaces
By Fairchild Semiconductor
FIN3385 's PackagesFIN3385 's pdf datasheet

FIN3385 Pinout, Pinouts
FIN3385 pinout,Pin out
This is one package pinout of FIN3385,If you need more pinouts please download FIN3385's pdf datasheet.

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FIN3385 Pb-Free FIN3385 Cross Reference FIN3385 Schematic FIN3385 Distributor
FIN3385 Application Notes FIN3385 RoHS FIN3385 Circuits FIN3385 footprint
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