3.3v Tft-lcd Timing Controller With Dual Lvds Inputs/dual Rsds?⠏utputs For Tft-lcd Monitor And Notebook (sxga/sxga/uxga) - National Semiconductor

The FPD87392BXB Panel Timing Controller is an integrated FPD-Link + RSDS + TFT-LCD Timing Controller. The Logic architecture is implemented using standard and default tim- ing controller functionality based on an Embedded Gate Array. The device is reconfigurable to the needs of a specific application by providing user-defined specifications or cus- tomer supplied VHDL/Verilog code. The FPD87392BXB is a Timing controller that combines an LVDs dual pixel input Interface with Nationals Reduced Swing Differential Signaling (RSDS) output column driver Interface for SXGA, SXGA+ and UXGA resolutions. It re- sides on the TFT-LCD panel and provides the data buffering and control signal generation. The RSDS data path to the column driver contributes toward lowering radiated EMI and reduced system dynamic power consumption. The RSDS dual 12 pair differential bus conveys up to 24-bit color data for SXGA/SXGA+/UXGA panels when using VESA 60Hz standard Timing By National Semiconductor Corporation
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FPD87392BXB Pinout, Pinouts
FPD87392BXB pinout,Pin out
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