• Product pinout
  • Description
  • SN74LVC1G175,Single D-Type Flip-Flop With Asynchronous Clear
  • The SN74LVC1G175 has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on the clock\'s (CLK) rising edge. When CLR is low, Q is forced into the low state, regardless of the clock edge or data ...
  • CD4013B,CMOS Dual D-Type Flip Flop
  • CD4013B consists of two identical, independent data-type Flip-Flops Each flip-flop has independent data, set, reset, and clock inputs and Q and Q outputs. These devices can be used for shift register applications, and , by connecting Q output to the data ...
  • CD40174B,CMOS Hex D-Type Flip-Flop
  • Cd40174B consists of six identical ?D?-type Flip-Flops having independent DATA inputs. The CLOCK and CLEAR inputs are common to all six units. Data are transferred to the Q outputs on the positive-going transition of the clock pulse. All sic Flip-Flops are ...
  • CD40175B,CMOS Quad D-Type Flip-Flop
  • Cd40175B consists of four identical D-type Flip-Flops Each flip-flop has an independent DATA D input and complementary Q and Q outputs. The CLOCK and CLEAR inputs are common to all Flip-Flops Data are transferred to the Q outputs on the positive-going ...
  • CD74AC174,Hex D-Type Flip-Flops With Reset
  • The CD74AC174 is a positive-edge-triggered D-type flip-flop with a direct clear (CLR) input and is designed for 1.5-V to 5.5-V VCC operation.
    Information at the data (D) inputs that meets the setup time requirements is transferred to the outputs on the ...
  • CD74AC175,Quad D-Type Flip-Flops With Reset
  • This positive-edge-triggered D-type flip-flop has a direct clear (CLR) input. The CD74AC175 features complementary outputs from each flip-flop.
    Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the ...
  • CD74AC273,Octal D-Type Flip-Flops With Reset
  • The ?AC273 and ?ACT273 devices are octal D-type Flip-Flops with reset that utilize advanced CMOS logic technology. Information at the D input is transferred to the Q output on the positive-going edge of the clock pulse. All eight Flip-Flops are controlled by a ...
  • CD74ACT174,Hex D-Type Flip-Flops With Reset
  • The CD74ACT174 devices are positive-edge-triggered D-type Flip-Flops with a direct clear (CLR) input and are designed for 4.5-V to 5.5-V VCC operation.
    Information at the data (D) inputs that meets the setup time requirements is transferred to the ...
  • CD74ACT175,Quad D-Type Flip-Flops With Reset
  • This positive-edge-triggered D-type flip-flop has a direct clear (CLR) input. The CD74ACT175 features complementary outputs from each flip-flop.
    Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the ...
  • CD74ACT273,Octal D-Type Flip-Flops With Reset
  • The CD74ACT273 and CD74ACT273 devices are octal D-type Flip-Flops with reset that utilize advanced CMOS logic technology. Information at the D input is transferred to the Q output on the positive-going edge of the clock pulse. All eight Flip-Flops are ...
  • CD74HC174,High Speed CMOS Logic Hex D-Type Flip-Flops With Reset
  • The ?HC174 and ?HCT174 are edge triggered Flip-Flops which utilize silicon gate CMOS circuitry to implement D-type Flip-Flops They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave Flip-Flops with ...
  • CY74FCT273T,Octal D-Type Flip-Flops With Clear
  • The FCT273T devices consist of eight edge-triggered D-type Flip-Flops with individual D inputs and Q outputs. The common buffered-clock (CP) and master-reset (MR) inputs load and reset all Flip-Flops simultaneously. These devices are edge-triggered registers. ...
  • CY74FCT377T,Octal D-Type Flip-Flops With Enable
  • The FCT377T devices have eight triggered D-type Flip-Flops with individual data (D) inputs. The common buffered clock (CP) inputs load all Flip-Flops simultaneously when the clock-enable (CE) input is low. The register is fully edge triggered. The state of ...
  • SN74LVC1G79,Single Positive-Edge-Triggered D-Type Flip-Flop
  • This single positive-edge-triggered D-type flip-flop SN74LVC1G79 is designed for 1.65-V to 5.5-V VCC operation. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the ...
  • SN74ABT273,Octal Edge-Triggered D-Type Flip-Flops With Clear
  • The SN74ABT273 are 8-bit positive-edge-triggered D-type Flip-Flops with a direct clear () input. They are particularly suitable for implementing buffer and storage registers, shift registers, and pattern generators.
    Information at the data (D) inputs ...
  • SN74AHC174,Hex D-Type Flip-Flops With Clear
  • The SN74AHC174 devices are positive-edge-triggered D-type Flip-Flops with a direct clear (CLR) input and are designed for 2-V to 5.5-V VCC operation.
    Information at the data (D) inputs that meets the setup time requirements is transferred to the outputs ...
  • SN74AHC273,Octal D-Type Flip-Flops With Clear
  • These circuits SN74AHC273 are positive-edge-triggered D-type Flip-Flops with a direct clear (CLR) input.
    Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) ...
  • SN74AHCT174,Hex D-Type Flip-Flops With Clear
  • These positive-edge-triggered D-type Flip-Flops SN74AHCT174 have a direct clear (CLR) input.
    Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock ...
  • SN74AHCT273,Octal D-Type Flip-Flops With Clear
  • These devices SN74AHCT273 are positive-edge-triggered D-type Flip-Flops with a direct clear (CLR) input.
    Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) ...
  • SN74F174A,Hex D-Type Flip-Flop With Clear
  • This monolithic, positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a direct clear () input. Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the ...
  • SN74F175,Quadruple D-Type Flip-Flops With Clear
  • This positive-edge-triggered flip-flop SN74F175 utilizes TTL circuitry to implement D-type flip-flop logic with a direct clear (CLR) input. Information at the data (D) inputs meeting setup-time requirements is transferred to outputs on the positive-going edge ...
  • SN74F377A,Octal D-Type Flip-Flop With Clock Enable
  • The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The SN74F377A features a latched clock enable () input.
    Information at the data (D) inputs meeting the setup time requirements is transferred to the ...
  • SN74HC174,Hex D-Type Flip-Flops With Clear
  • These positive-edge-triggered D-type Flip-Flops have a direct clear (CLR) input.
    Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering ...
  • SN74HC175,Quadruple D-Type Flip-Flops With Clear
  • These positive-edge-triggered D-type Flip-Flops have a direct clear (CLR) input. The SN74HC175 devices feature complementary outputs from each flip-flop.
    Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs ...
  • SN74HC273,Octal D-Type Flip-Flops With Clear
  • These circuits are positive-edge-triggered D-type Flip-Flops SN74HC273 with a direct clear (CLR) input.
    Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) ...
  • SN74HC377,Octal D-Type Flip-Flops With Clock Enable
  • These devices are positive-edge-triggered octal D-type Flip-Flops with an enable input. The SN74HC377 devices are similar to the ?HC273 devices, but feature a latched clock-enable (CLKEN) input instead of a common clear.
    Information at the data (D) ...
  • SN74HCT273,Octal D-Type Flip-Flops With Clear
  • These devices are positive-edge-triggered D-type Flip-Flops with a common enable input. The SN74HCT273 devices are similar to the SN74HCT273 devices, but feature a common clear enable (CLR) input instead of a latched clock.
    Information at the data (D) ...
  • SN74HCT377,Octal D-Type Flip-Flops With Clock Enable
  • These devices are positive-edge-triggered D-type Flip-Flops The ? SN74HCT377 devices are similar to the \'HCT273 devices, but feature a latched clock-enable (CLKEN) input instead of a common clear.
    Information at the data (D) inputs meeting the setup ...
  • SN74LS174,Hex D-Type Flip-Flops With Clear
  • These monolithic, positive-edge-triggered Flip-Flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the \'175, \'LS175, and \'S175 feature complementary outputs from each flip-flop.
    Information at the D ...
  • SN74LS175,Quadruple D-Type Flip-Flops With Clear
  • These monolithic, positive-edge-triggered Flip-Flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the \'175, \'LS175, and \'S175 feature complementary outputs from each flip-flop.
    Information at the D ...
  • SN74LS273,Octal D-Type Flip-Flops With Clear
  • These monolithic, positive-edge-triggered Flip-Flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input.
    Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going ...
  • SN74LS377,Octal D-Type Flip-Flops With Clock Enable
  • These monolithic, positive-edge-triggered Flip-Flops utilize TTL circuitry to implement D-type flip-flop logic with an enable input. The \'LS377, \'LS378, and \'LS379 devices are similar to \'LS273, \'LS174, and \'LS175, respectively, but feature a common ...
  • SN74LS378,Hex D-Type Flip-Flops With Clock Enable
  • These monolithic, positive-edge-triggered Flip-Flops utilize TTL circuitry to implement D-type flip-flop logic with an enable input. The \'LS377, \'LS378, and \'LS379 devices are similar to \'LS273, \'LS174, and \'LS175, respectively, but feature a common ...
  • SN74LV174A,Hex D-Type Flip-Flops With Clear
  • The \'LV174A devices are hex D-type Flip-Flops designed for 2-V to 5.5-V VCC operation.
    These devices are monolithic positive-edge-triggered Flip-Flops with a direct clear (CLR) input. Information at the data (D) inputs meeting the setup time requirements ...
  • SN74LV175A,Quadruple D-Type Flip-Flops With Clear
  • The \'LV175A devices are quadruple D-type Flip-Flops designed for 2-V to 5.5-V VCC operation.
    These devices have a direct clear (CLR) input and feature complementary outputs from each flip-flop.
    Information at the data (D) inputs meeting the setup ...
  • SN74LV273A,Octal D-Type Flip-Flops With Clear
  • The SN74LV273A devices are octal D-type Flip-Flops designed for 2-V to 5.5-V VCC operation.
    These devices are positive-edge-triggered Flip-Flops with direct clear (CLR) input. Information at the data (D) inputs meeting the setup time requirements is ...
  • SN74LV74A,Dual Positive-Edge-Triggered D-Type Flip-Flops
  • These dual positive-edge-triggered D-type Flip-Flops SN74LV74A are designed for 2-V to 5.5-V VCC operation.
    A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR ...
  • SN74LVTH273,3.3-V ABT Octal D-Type Flip-Flops With Clear
  • These octal D-type Flip-Flops SN74LVTH273 are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
    The ?LVTH273 devices are positive-edge-triggered Flip-Flops with a ...
  • SN74S174,Hex D-Type Flip-Flops With Clear
  • These monolithic, positive-edge-triggered Flip-Flops SN74S174 utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the \'175, \'LS175, and \'S175 feature complementary outputs from each flip-flop.
    Information at ...
  • SN74S175,Quadruple D-Type Flip-Flops With Clear
  • These monolithic, positive-edge-triggered Flip-Flops SN74S175 utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the \'175, \'LS175, and \'S175 feature complementary outputs from each flip-flop.
    Information at ...
  • CD74AC374,Octal D-Type Flip-Flops With 3-State Outputs
  • The RCA-CD54/74AC374 and CD54/74AC534 and the CD54/74ACT374 and CD54/74ACT534 octal D-type, 3-state, positive-edge triggered Flip-Flops use the RCA ADVANCED CMOS technology. The eight Flip-Flops enter data into their registers on the LOW-to-HIGH transition of ...
  • CD74AC534,Octal D-Type Flip-Flops With 3-State Outputs
  • The RCA-CD54/74AC374 and CD54/74AC534 and the CD54/74ACT374 and CD54/74ACT534 octal D-type, 3-state, positive-edge triggered Flip-Flops use the RCA ADVANCED CMOS technology. The eight Flip-Flops enter data into their registers on the LOW-to-HIGH transition of ...
  • CD74ACT374,Octal D-Type Flip-Flops With 3-State Outputs
  • The RCA-CD54/74AC374 and CD54/74AC534 and the CD54/74ACT374 and CD54/74ACT534 octal D-type, 3-state, positive-edge triggered Flip-Flops use the RCA ADVANCED CMOS technology. The eight Flip-Flops enter data into their registers on the LOW-to-HIGH transition of ...