GAL Data Sheets High-Speed E2 CMOS PLD Generic Array Logic™GAL16VP8 GAL Data Sheets The GAL16VP8 with 64 mA drive capability and 15 ns maximum
propagation delay time is ideal for Bus and Memory control appli-
cations. The GAL16VP8 is manufactured using Lattice
Semiconductor's advanced E2
CMOS process which combines
CMOS with Electrically Erasable (E2
) floating Gate technology. High
speed erase times (<100ms) allow the devices to be reprogrammed
quickly and efficiently.
System bus and memory Interfaces require control Logic before
driving the bus or memory Interface signals. The GAL16VP8
combines the familiar GAL16V8 architecture with bus drivers as
its outputs. The generic architecture provides maximum design flex-
ibility by allowing the Output Logic Macrocell (OLMC) to be con-
figured by the user. The 64mA output drive eliminates the need for
additional devices to provide bus driving capability.
Unique test circuitry and reprogrammable cells allow complete AC,
DC, and functional testing during manufacture. As a result, Lattice
Semiconductor delivers 100% field programmability and function-
ality of all GAL products. In addition, 100 erase/write cycles and
data retention in excess of 20 years are specified. By Lattice Semiconductor Corp.
|
|

| GAL16VP8 Pb-Free | GAL16VP8 Cross Reference | GAL16VP8 Schematic | GAL16VP8 Distributor |
| GAL16VP8 Application Notes | GAL16VP8 RoHS | GAL16VP8 Circuits | GAL16VP8 footprint |
