Video Decoder

The Video Decoder(VD) decodes GDC21D401B Video elementary stream of MPEG-2(ISO/ICE 13818-2)MP@HL. It supports the ATSC digital TV Video standard, and CAN be used for the Video part of the ATSC digital TV with the Transport Decoder and the VDP(Video Display Processor). Picture decoding Timing CAN be controlled internally for A/V lip synchronization, and externally for Video Trick Mode by host Microprocessor via I 2 C bus. The Video Decoder CAN extract Video user data including caption from Video elementary stream, and host Microprocessor CAN read the Video user data from the Video Decoder(VD) via I 2 C. It uses four 16x1M SDRAMs and CAN support up to 81 MHz memory Clock speed. By Hynix Semiconductor
GDC21D401B 's PackagesGDC21D401B 's pdf datasheet

GDC21D401B Pinout, Pinouts
GDC21D401B pinout,Pin out
This is one package pinout of GDC21D401B,If you need more pinouts please download GDC21D401B's pdf datasheet.

GDC21D401B circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

Related Electronics Part Number

Related Keywords:

GDC21D401B Pb-Free GDC21D401B Cross Reference GDC21D401B Schematic GDC21D401B Distributor
GDC21D401B Application Notes GDC21D401B RoHS GDC21D401B Circuits GDC21D401B footprint