GTL2009 3-bit GTL Front-Side Bus Frequency Comparator

The GTL2009 is designed for the Nocona and Dempsey/Blackford dual Intel Xeon processor platforms to compare the Front-Side Bus (FSB) frequency settings and set the common FSB frequency at the lowest setting if both processor slots are occupied or the FSB setting of the occupied processor slot if only one processor is being used. A default FSB frequency of 100 MHz is initially set upon power-up when VDD is greater than 1.5 V. Magnitude comparisons and frequency multiplexing to compute the common FSB frequency occurs when the two 3-bit FSB GTL inputs from the chip sets are valid. The common FSB frequency GTL outputs Switch from the default frequency to the computed frequency when the GTL reference voltage input (VREF) crosses a static 0.6 V internally generated input Comparator reference voltage. The GTL2009 then continually monitors the FSB frequency and slot occupied inputs for any further changes. The Nocona and Dempsey/Blackford Xeon processors specify a VTT of 1.2 V and 1.1 V, as well as a nominal Vref of 0.76 V and 0.73 V respectively. To allow for future voltage level changes that may extend Vref to 0.63 of VTT (minimum of 0.693 V with VTT of 1.1 V) the GTL2009 allows a minimum Vref of 0.66 V. Characterization results show that there is little DC or AC performance variation between these levels. The GTL2009 is a companion chip to the GTL2006 platform health management GTL-to-LVTTL translator and the newer GTL2007 that adds an enable function that disables the error output to the monitoring agent for platforms that monitor the individual error conditions from each processor.
By NXP Semiconductors