Rad-Hard Synchronous Counter

The Intersil HCS161MS is a Radiation Hardened 4-Input Binary; synchronous Counter featuring asynchronous reset and lookahead carry Logic The HCS161 has an active-low master reset to zero, MR. A low level at the synchronous parallel enable, SPE, disables counting and allows data at the preset inputs (p0 - p3) to load the Counter The data is latched to the outputs on the positive edge of the Clock input, CP. The HCS161MS has two count output, IC. The terminal count output indicates a maximum count for one Clock pulse and is used to enable the next cascaded stage to count.
The HCS161MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS161MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
By Intersil Corporation
HCS161MS 's PackagesHCS161MS 's pdf datasheet
HCS161DMSR DIP
HCS161HMSR
HCS161KMSR




HCS161MS Pinout, Pinouts
HCS161MS pinout,Pin out
This is one package pinout of HCS161MS,If you need more pinouts please download HCS161MS's pdf datasheet.

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