Bus Buffer Gate With 3-state OutputThe HD74ALVC1G126 has a bus Buffer Gate with 3-state output in a 5 pin package. Output is disabled
when the associated output enable (OE) input is low. To ensure the high impedance state during power up
or power down, OE should be connected to GND through a pull-down resistor; the minimum value of the
resistor is determined by the current sourcing capability of the driver. Low voltage and high-speed
operation is suitable for the battery powered products (e.g., notebook computers), and the low power
consumption extends the battery life. By Renesas Technology
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HD74ALVC1G126 Pb-Free | HD74ALVC1G126 Cross Reference | HD74ALVC1G126 Schematic | HD74ALVC1G126 Distributor |
HD74ALVC1G126 Application Notes | HD74ALVC1G126 RoHS | HD74ALVC1G126 Circuits | HD74ALVC1G126 footprint |