Bus Buffer Inverted With 3-state Output

The HD74ALVC1G240 has a bus Buffer inverted with 3-state output in a 5 pin package. Output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current sinking capability of the driver. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. By Renesas Technology
HD74ALVC1G240 's PackagesHD74ALVC1G240 's pdf datasheet

HD74ALVC1G240 Pinout, Pinouts
HD74ALVC1G240 pinout,Pin out
This is one package pinout of HD74ALVC1G240,If you need more pinouts please download HD74ALVC1G240's pdf datasheet.

HD74ALVC1G240 circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

Related Electronics Part Number

Related Keywords:

HD74ALVC1G240 Pb-Free HD74ALVC1G240 Cross Reference HD74ALVC1G240 Schematic HD74ALVC1G240 Distributor
HD74ALVC1G240 Application Notes HD74ALVC1G240 RoHS HD74ALVC1G240 Circuits HD74ALVC1G240 footprint
Hot categories