3.3-v 20-bit Flip Flops With 3-state Outputs - Hitachi Semiconductor

The HD74ALVCH16721s twenty flip flops are edge triggered D-type flip flops with qualified Clock storage. On the positive transition of the Clock (CLK) input, the device provides true data at the Q outputs, provided that the Clock enable (CLKEN) input is low. If CLKEN is high, no data is stored. A buffered output enable (OE) input CAN be used to place the twenty outputs in either a normal Logic state (high or low level) or a high impedance state. In the high impedance state, the outputs neither load nor drive the bus lines significantly. The high impedance state and increased drive provide the capability to drive bus lines without need for Interface or pullup components. The output enable (OE) input does not affect the internal operation of the flip flops. Old data CAN be retained or new data CAN be entered while the outputs are in the high impedance state. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid Logic level. By Renesas Technology
HD74ALVCH16721 's PackagesHD74ALVCH16721 's pdf datasheet

HD74ALVCH16721 Pinout, Pinouts
HD74ALVCH16721 pinout,Pin out
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