3-to-8-line Decoder/Demultiplexer With Address Latch

The HD74HC137 implements a three-to-eight line decoder with Latches on the three address inputs. When GL goes from low to high, the address present at the select inputs (A, B and C) is stored in the Latches As long as GL remains high no address changes will be recognized. Output enable controls, G1 and G2, control the state of the outputs independently of the select or latch-enable inputs. By Renesas Technology
HD74HC137 's PackagesHD74HC137 's pdf datasheet
HD74HC137P
HD74HC137FPEL SOP
HD74HC137RPEL SOP




HD74HC137 Pinout, Pinouts
HD74HC137 pinout,Pin out
This is one package pinout of HD74HC137,If you need more pinouts please download HD74HC137's pdf datasheet.

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