8-bit Addressable Latch

The HD74HC259 has a single data input (D), 8 latch outputs (Q0-Q7), 3 address inputs (A, B, and C), a common enable input (E), and a common clear input. To operate this device as an addressable latch, data is held on the D input, and the address of the latch into which the data is to be entered is held on the A, B and C inputs. When enable is taken low the data flows through to the addressed output. The data is stored when enable transitions from low to high. All unaddressed Latches will remain unaffected. With enable in the high state the device is deselected, and all Latches remain in their previous state, unaffected by changes on the data or address inputs. To eliminate the possibility of entering erroneous data into the Latches the enable should be held high (inactive) while the address lines are changing. By Renesas Technology
HD74HC259 's PackagesHD74HC259 's pdf datasheet
HD74HC259P
HD74HC259FPEL
HD74HC259RPEL




HD74HC259 Pinout, Pinouts
HD74HC259 pinout,Pin out
This is one package pinout of HD74HC259,If you need more pinouts please download HD74HC259's pdf datasheet.

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