Dual Bus Buffer Inverted With 3–state Output CMOS Logic Level ShifterThe HD74LV2GT240A has dual bus Buffer inverted with 3state output in an 8 pin package. Tw
inverters are included in one circuit. Each circuit CAN be independently controlled by the enable signal 1OE
or 2OE, which enables outputs when receiving a low-level signal. The input protection circuitry on this
device allows over voltage tolerance on the input, allowing the device to be used as a logiclevel translato
from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS Logic to 3.0 V CMOS Logic while
operating at the High-Voltage power supply. Low voltage and high-speed operation is suitable for the
battery powered products (e.g., notebook computers), and the low power consumption extends the battery
life. By Renesas Technology
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| HD74LV2GT240A Pb-Free | HD74LV2GT240A Cross Reference | HD74LV2GT240A Schematic | HD74LV2GT240A Distributor |
| HD74LV2GT240A Application Notes | HD74LV2GT240A RoHS | HD74LV2GT240A Circuits | HD74LV2GT240A footprint |
