DVB/DSS Compliant Receiver

The HDM8515 digital Demodulator for direct broadcast satellite receivers is a single chip solution fully compliant with the European Telecommunications Standards Institute (ETSI) specification ETS 300 421. This chip integrates an A/D converter a variable rate matched Filter a variable rate QPSK Demodulator with a Viterbi decoder, a deinterleaver and a Reed Solomon decoder. The HDM8515 which is implemented in a 0.25 micron CMOS, Four Layer Metal Process, provides variable rate capability while operating with a fixed frequency sampling Clock Digital samples of baseband I and Q data are generated by an internal A/D converter then provided to the Demodulator at a fixed sample rate. The root raised cosine Filter is implemented internally with fully digital techniques. Similarly, the symbol Timing recovery and Carrier phase tracking functions are performed entirely in the digital domain. This approach provides minimum constraints on external circuits, thus reducing overall system costs. By Hynix Semiconductor
HDM8515 's PackagesHDM8515 's pdf datasheet



HDM8515 Pinout will be updated soon..., now you can download the pdf datasheet to check the pinouts !
HDM8515 circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

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