HEF4014B 8-bit Static Shift Register

HEF4014B 8-bit static Shift register The HEF4014B is a fully synchronous edge-triggered 8-bit static Shift register with eight synchronous parallel inputs (P0 to P7 ), a synchronous serial data input (DS ), a synchronous parallel enable input (PE), a LOW to HIGH edge-triggered Clock input (CP) and buffered parallel outputs from the last three stages (O5 to O7 ). Operation is synchronous and the device is edge-triggered on the LOW to HIGH transition of CP. Each Register stage is of a D-type master-slave Flip-Flop When PE is HIGH, data is loaded into the Register from P0 to P7 on the LOW to HIGH transition of CP. When PE is LOW, data is shifted to the first position from DS , and all the data in the Register is shifted one position to the right on the LOW to HIGH transition of CP. Schmitt-trigger action in the Clock input makes the circuit highly tolerant to slower Clock rise and fall times
By NXP Semiconductors
HEF4014B 's PackagesHEF4014B 's pdf datasheet
HEF4014BP DIP
HEF4014BT SO




HEF4014B Pinout, Pinouts
HEF4014B pinout,Pin out
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