HEF4040B 12-stage Binary Counter

The HEF4040B is a 12-stage binary ripple Counter with a Clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (O0 to O11 ). The Counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all Counter stages and forces all outputs LOW, independent of CP. Each Counter stage is a static toggle Flip-Flop Schmitt-trigger action in the Clock input makes the circuit highly tolerant to slower Clock rise and fall times.
By NXP Semiconductors
HEF4040B 's PackagesHEF4040B 's pdf datasheet

HEF4040B Pinout, Pinouts
HEF4040B pinout,Pin out
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