HEF4534B LSI Real Time 5-decade Counter

HEF4534B LSI Real time 5-decade Counter The HEF4534B is a 5-decade ripple Counter The binary outputs of the decade Counters are time-multiplexed by an internal scanner on four BCD outputs (O0 to O3 ). The selected decade is indicated by a Logic HIGH on the appropriate digit select output (OS0 : units, 1; OS1 : tens, 10; OS2 : hundreds, 102 ;OS3 : thousands, 103, ; OS4 : ten thousands, 104 ). The binary outputs (O0 to O3 ) and the select outputs (OS0 to OS4 ) are 3-state controlled via enable inputs EO and EOS respectively, allowing Interface with other bus orientated devices. Cascading may be accomplished by using the carry out (TC). The Counter is triggered by a LOW to HIGH transition on the decade Clock (CPA) and is reset by a HIGH level on the master reset (MR). The scanner is triggered by a LOW to HIGH transition on the scanner Clock (CPS) and is reset (select ten thousand counter) by a HIGH level on the scanner reset (MRsc ).The Counter CAN operate in four modes depending on the state of the mode select inputs (SASB ). The error detector will detect an error when a positive edge on CPA is not accompanied by a negative edge on the error detector Clock CPE or vice versawithin time limits adjusted by external capacitors connected to Cext1 and Cext2. Three or more detected errors result in a HIGH level on the error output (OER). The error detector is reset by a HIGH level on MR. Schmitt-trigger action in the Clock inputs makes the circuit highly tolerant to slower Clock rise and fall times.
By NXP Semiconductors
HEF4534B 's PackagesHEF4534B 's pdf datasheet



HEF4534B Pinout, Pinouts
HEF4534B pinout,Pin out
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