J1850 Bus Transceiver For Multiplex Wiring Systems

The HIP7020 IC is an Integrated I/O Bus Transceiver designed for the SAE Standard J1850 Class B Data Com- munication Network Interface The Bus transmits and receives data on a single wire using a 10.4kHz VPWM (Vari- able Pulse Width Modulated) signal. The HIP7020 serves as an I/O Buffer interfacing to 5V CMOS Logic It is designed to operate directly from the 12V battery line of an automobile. The normal Bus voltage swing capability is from 0V to 7.75V at currents greater than 20mA. The HIP7020 Receiver input, BUS IN is connected to the J1850 Bus through an external resistor, RF and has a trip point at one-half of the nominal Bus signal voltage which is 3.875V. The Receiver input is ltered to remove high fre- quency Bus noise by the external resistor and an internal capacitor. The Receiver Bus signal, after processing, is out- put at the RX pin by the RX Buffers Open Collector driver. The RX output is active low and requires an external pull-up resistor returned to the control Logic VCC supply. This pre- vents power-up of the control Logic by the transceiver if VCC supply voltage is removed. The HIP7020 has a Loop-Back Enable Mode Switch to return diagnostic information for the Bus Transceiver node. For an active low or an open LB EN input, the Trans- mit/Receive signals are internally Looped-Back to provide aTXto RX return signal path independent of signals on the Bus. A return path validation indicates proper action of the Bus Transceiver apart from the J1850 Bus. By Intersil Corporation
HIP7020 's PackagesHIP7020 's pdf datasheet

HIP7020 Pinout, Pinouts
HIP7020 pinout,Pin out
This is one package pinout of HIP7020,If you need more pinouts please download HIP7020's pdf datasheet.

HIP7020 Application circuits
HIP7020 circuits
This is one application circuit of HIP7020,If you need more circuits,please download HIP7020's pdf datasheet.

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