The ICS843002-31 is a member of the HiperClockS family of high performance Clock solutions from IDT. This monolithic device is a high- performance, PLL-based synchronous Clock generator and jitter attenuation circuit. The ICS843002-31 contains two Clock multiplication stages that are cascaded in series. The first stage is a VCXO-based PLL that is optimized to provide reference Clock jitter attenuation, to be jitter tolerant, and to provide a stable reference Clock for the second multiplication stage. The second stage is the proprietary IDT FemtoClock circuit which is a high-frequency, sub- picosecond Clock multiplier. The VCXO PLL has an on-chip VCXO circuit that uses an external, inexpensive pullable crystal in the 17.5 to 25MHz range. The PLL includes 13 bit reference and feedback dividers supporting complex PLL multiplication ratios and input reference Clock rates as low as 2.3kHz. External loop Filter components are used (two resistors and two capacitors) to achieve the low loop bandwidth needed for jitter atten- uation of a recovered data Clock The FemtoClock circuit CAN multiply the VCXO crystal frequency by a factor of 28 or 32 (selectable) and provide a Clock output of up to 700MHz By Integrated Device Technology
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ICS843002BY-31 TQFP
ICS843002BY31 TQFP
ICS843002BY-31T TQFP

ICS843002-31 Pinout, Pinouts
ICS843002-31 pinout,Pin out
This is one package pinout of ICS843002-31,If you need more pinouts please download ICS843002-31's pdf datasheet.

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