DDR Zero Delay Clock Buffer

Low skew, low jitter PLL Clock Driver Max frequency supported = 266MHz (DDR 533) I2C for functional and output control Feedback pins for input to output synchronization Spread Spectrum tolerant inputs 3.3V tolerant CLK_INT/C input By Integrated Device Technology
ICS93776 's PackagesICS93776 's pdf datasheet
ICS93776AF SSOP
ICS93776AFT SSOP




ICS93776 Pinout, Pinouts
ICS93776 pinout,Pin out
This is one package pinout of ICS93776,If you need more pinouts please download ICS93776's pdf datasheet.

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