Programmable Timing Control Hub For K7TM System

SiS 746 - The ICS952702 is a two chip Clock solution for desktop designs using SIS 746 style chipsets. When used with a zero delay Buffer such as the ICS9179-16 for PC133 or the ICS93735 for DDR applications it provides all the necessary Clocks signals for such a system. Output Features: 1 - Pair of differential open drain CPU outputs 1 - Single-ended open drain CPU output 8 - PCICLK @ 3.3V including 2 PCI Clock free running 2 - AGPCLK @ 3.3V 3 - REF @ 3.3V 2 - ZCLK @ 3.3V 2 - IOAPIC @ 2.5V 1 - 12_48MHz @ 3.3V 1 - 24_48MHz @ 3.3V By Integrated Device Technology
ICS952702 's PackagesICS952702 's pdf datasheet
ICS952702BF SSOP
ICS952702BFLF SSOP
ICS952702BFLFT SSOP
ICS952702BFT SSOP




ICS952702 Pinout, Pinouts
ICS952702 pinout,Pin out
This is one package pinout of ICS952702,If you need more pinouts please download ICS952702's pdf datasheet.

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