3.3V Zero Delay Clock Multiplier

The IDT2308B is a high-speed phase-lock loop (PLL) Clock multiplier. It is designed to address high-speed Clock Distribution and multiplication applica- tions. The zero delay is achieved by aligning the phase between the incoming Clock and the output Clock operable within the range of 10 to 133MHz. The IDT2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks CAN be put in tri-state mode. In test mode, the PLL is turned off, and the input Clock directly drives the outputs for system testing purposes. In the absence of an input Clock the IDT2308B enters power down, and the outputs are tri-stated. In this mode, the device will draw less than 25A. By Integrated Device Technology
IDT2308B 's PackagesIDT2308B 's pdf datasheet
IDT2308B-1DC SOIC
IDT2308B-1DC8 SOIC
IDT2308B-1DCG SOIC
IDT2308B-1DCG8 SOIC
IDT2308B-1DCGI SOIC
IDT2308B-1DCGI8 SOIC
IDT2308B-1DCI8 SOIC
IDT2308B-1HDC SOIC
IDT2308B-1HDC8 SOIC
IDT2308B-1HDCG SOIC
IDT2308B-1HDCG8 SOIC
IDT2308B-1HDCGI SOIC
IDT2308B-1HDCGI8 SOIC
IDT2308B-1HDCI SOIC
IDT2308B-1HDCI8 SOIC
IDT2308B-1HPG TSSOP
IDT2308B-1HPG8 TSSOP
IDT2308B-1HPGG TSSOP
IDT2308B-1HPGG8 TSSOP
IDT2308B-1HPGGI TSSOP
IDT2308B-1HPGGI8 TSSOP
IDT2308B-1HPGI TSSOP
IDT2308B-1HPGI8 TSSOP
IDT2308B-2DC SOIC
IDT2308B-2DC8 SOIC
IDT2308B-2DCG SOIC
IDT2308B-2DCG8 SOIC
IDT2308B-2DCGI SOIC
IDT2308B-2DCGI8 SOIC
IDT2308B-2DCI SOIC
IDT2308B-2DCI8 SOIC
IDT2308B-3DC SOIC
IDT2308B-3DC8 SOIC
IDT2308B-3DCG SOIC
IDT2308B-3DCG8 SOIC
IDT2308B-4DC SOIC
IDT2308B-4DC8 SOIC
IDT2308B-4DCG SOIC
IDT2308B-4DCG8 SOIC
IDT2308B-4DCI SOIC
IDT2308B-4DCI8 SOIC
IDT2308B-5HPG TSSOP
IDT2308B-5HPG8 TSSOP




IDT2308B Pinout, Pinouts
IDT2308B pinout,Pin out
This is one package pinout of IDT2308B,If you need more pinouts please download IDT2308B's pdf datasheet.

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