3.3V Zero Delay Clock Buffer, Spread Spectrum Compatible

The IDT23S05E is a high-speed phase-lock loop (PLL) Clock Buffer designed to address high-speed Clock Distribution applications. The zero delay is achieved by aligning the phase between the incoming Clock and the output Clock operable within the range of 10 to 200MHz. The IDT23S05E is an 8-pin version of the IDT23S09E. IDT23S05E accepts one reference input, and drives out five low skew Clocks The -1H version of this device operates up to 200MHz frequency and has a higher drive than the -1 device. All parts have on-chip PLLs which lock to an input Clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. In the absence of an input Clock the IDT23S05E enters power down. In this mode, the device will draw less than 12A fo Commercial Temperature range and less than 25A for Industrial tempera ture range, the outputs are tri-stated, and the PLL is not running, resulting in a significant reduction of power. By Integrated Device Technology
IDT23S05E 's PackagesIDT23S05E 's pdf datasheet
IDT23S05E-1DC SOIC
IDT23S05E-1DC8 SOIC
IDT23S05E-1DCG SOIC
IDT23S05E-1DCG8 SOIC
IDT23S05E-1DCGI SOIC
IDT23S05E-1DCGI8 SOIC
IDT23S05E-1DCI SOIC
IDT23S05E-1DCI8 SOIC
IDT23S05E-1HDC SOIC
IDT23S05E-1HDC8 SOIC
IDT23S05E-1HDCG SOIC
IDT23S05E-1HDCG8 SOIC
IDT23S05E-1HDCGI SOIC
IDT23S05E-1HDCGI8 SOIC
IDT23S05E-1HDCI SOIC
IDT23S05E-1HDCI8 SOIC




IDT23S05E Pinout, Pinouts
IDT23S05E pinout,Pin out
This is one package pinout of IDT23S05E,If you need more pinouts please download IDT23S05E's pdf datasheet.

IDT23S05E circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

Related Electronics Part Number

Related Keywords:

IDT23S05E Pb-Free IDT23S05E Cross Reference IDT23S05E Schematic IDT23S05E Distributor
IDT23S05E Application Notes IDT23S05E RoHS IDT23S05E Circuits IDT23S05E footprint