2.5V Zero Delay Clock Buffer, Spread Spectrum Compatible

The IDT23S05T is a high-speed phase-lock loop (PLL) Clock Buffer designed to address high-speed Clock Distribution applications. The zero delay is achieved by aligning the phase between the incoming Clock and the output Clock operable within the range of 10 to 133MHz. The IDT23S05T is an 8-pin version of the IDT23S09T. IDT23S05T accepts one reference input, and drives out five low skew Clocks All parts have on-chip PLLs which lock to an input Clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. In the absence of an input Clock the IDT23S05T enters power down. In this mode, the device will draw less than 12 for Commercial Temperature Range and and less than 25 for Industrial temperature range, the outputs are tri- stated, and the PLL is not running, resulting in a significant reduction of power. The IDT23S05T is characterized for both Industrial and Commer- cial operation. By Integrated Device Technology
IDT23S05T 's PackagesIDT23S05T 's pdf datasheet
IDT23S05T-1DC SOIC
IDT23S05T-1DC8 SOIC
IDT23S05T-1DCG SOIC
IDT23S05T-1DCG8 SOIC
IDT23S05T-1DCGI SOIC
IDT23S05T-1DCGI8 SOIC
IDT23S05T-1DCI SOIC
IDT23S05T-1DCI8 SOIC




IDT23S05T Pinout, Pinouts
IDT23S05T pinout,Pin out
This is one package pinout of IDT23S05T,If you need more pinouts please download IDT23S05T's pdf datasheet.

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