2.5V Differential 1:5 Clock Buffer TeraBuffer

The IDT5T915 2.5V differential (DDR) Clock Buffer is a user-selectable single-ended or differential input to five differential outputs built on advanced metal CMOS technology. The differential Clock Buffer fanout from a single or differential input to five differential or single-ended outputs reduces loading on the preceding driver and provides an efficient Clock Distribution network. The IDT5T915 CAN act as a translator from a differential HSTL, eHSTL, 1.8V/2.5V LVTTL, LVEPECL, or single-ended 1.8V/2.5V LVTTL input to HSTL, eHSTL, 1.8V/2.5V LVTTL outputs. Selectable Interface is controlled by 3-level input signals that may be hard-wired to appropriate high-mid-low levels. By Integrated Device Technology
IDT5T915 's PackagesIDT5T915 's pdf datasheet
IDT5T915PAGI TSSOP
IDT5T915PAGI8 TSSOP
IDT5T915PAI TSSOP
IDT5T915PAI8 TSSOP




IDT5T915 Pinout, Pinouts
IDT5T915 pinout,Pin out
This is one package pinout of IDT5T915,If you need more pinouts please download IDT5T915's pdf datasheet.

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