2.5V LVDS 1:6 Clock Buffer TeraBuffer II

The IDT5T9306 2.5V differential Clock Buffer is a user-selectable differential input to six LVDs outputs. The fanout from a differential input to six LVDs outputs reduces loading on the preceding driver and provides an efficient Clock distribution network. The IDT5T9306 CAN act as a translator from a differential HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDs input to LVDs outputs. A single-ended 3.3V / 2.5V LVTTL input CAN also be used to translate to LVDs outputs. The redundant input capability allows for an asynchronous change-over from a primary Clock source to a secondary Clock source. Selectable reference inputs are controlled by SEL. By Integrated Device Technology
IDT5T9306 's PackagesIDT5T9306 's pdf datasheet

IDT5T9306 Pinout, Pinouts
IDT5T9306 pinout,Pin out
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