2.5V LVDS 1:4 Glitchless Clock Buffer Terabuffer II

The IDT5T93GL04 2.5V differential Clock Buffer is a user-selectable differential input to four LVDs outputs. The fanout from a differential input to four LVDs outputs reduces loading on the preceding driver and provides an efficient Clock Distribution network. The IDT5T93GL04 CAN act as a translator from a differential HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDs input to LVDs outputs. A single-ended 3.3V / 2.5V LVTTL input CAN also be used to translate to LVDs outputs. The redundant input capability allows for a glitchless change-over from a primary Clock source to a secondary Clock source up to 450MHz. Selectable inputs are controlled by SEL. During the switchover, By Integrated Device Technology
IDT5T93GL04 's PackagesIDT5T93GL04 's pdf datasheet
IDT5T93GL04PGGI TSSOP
IDT5T93GL04PGGI8 TSSOP
IDT5T93GL04PGI TSSOP
IDT5T93GL04PGI8 TSSOP




IDT5T93GL04 Pinout, Pinouts
IDT5T93GL04 pinout,Pin out
This is one package pinout of IDT5T93GL04,If you need more pinouts please download IDT5T93GL04's pdf datasheet.

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