16K X 36 X 2 SyncBiFIFO, 3.3VThe IDT72V3682 IDT72V3692 IDT72V36102 are designed to run off a 3.3V
supply for exceptionally low-power consumption. These devices are mono-
lithic, high-speed, low-power, CMOS Bidirectional SyncFIFO (clocked) memo-
ries which support Clock frequencies up to 100MHz and have read access times
as fast as 6.5ns. Two independent 16,384/32,768/65,536 x 36 dual-port
SRAM FIFOs on board each chip Buffer data in opposite directions. Commu-
nication between each port may bypass the FIFOs via two 36-bit mailbox
Registers Each mailbox Register has a flag to signal when new mail has been
stored. By Integrated Device Technology
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IDT72V3682 Pb-Free | IDT72V3682 Cross Reference | IDT72V3682 Schematic | IDT72V3682 Distributor |
IDT72V3682 Application Notes | IDT72V3682 RoHS | IDT72V3682 Circuits | IDT72V3682 footprint |