3.3V CMOS 18-Bit Universal Bus Driver With 3-State OutputsThis 18-bit universal bus driver is built using advanced dual metal
CMOS technology. Data flow from A to Y is controlled by the output-enable
(OE) input. The device operates in the transparent mode when the latch-
enable (LE) input is high. The A data is latched if the Clock (CLK) input is
held at a high or low Logic level. If LE is low, the A data is stored in the latch
Flip-Flop on the low-to-high transition of CLK. When OE is high, the outputs
are in the high-impedance state. By Integrated Device Technology
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IDT74ALVC16835 Pb-Free | IDT74ALVC16835 Cross Reference | IDT74ALVC16835 Schematic | IDT74ALVC16835 Distributor |
IDT74ALVC16835 Application Notes | IDT74ALVC16835 RoHS | IDT74ALVC16835 Circuits | IDT74ALVC16835 footprint |