18-Bit Registered TransceiverThe IDT74FCT162500T 18-bit registered transceivers are built using advanced
dual metal CMOS technology. These high-speed, low-power 18-bit registered
Bus Transceivers combine D-type Latches and D-type Flip-Flops to allow data flow
in transparent, latched and clocked modes. Data flow in each direction is
controlled by output-enable (OEAB and OEBA), latch enable (LEAB and LEBA)
and Clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device
operates in transparent mode when LEAB is high. When LEAB is low, the A data
is latched if CLKAB is held at a high or low Logic level. If LEAB is low, the A bus
data is stored in the latch Flip-Flop on the high-to-low transition of CLKAB. OEAB
performs the output enable function on the B port. Data flow from B port to A
port is similar but uses OEBA, LEBA and CLKBA. Flow-through organization
of signal pins simplifies layout. All inputs are designed with hysteresis for
improved noise margin. By Integrated Device Technology
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| IDT74FCT162500T Pb-Free | IDT74FCT162500T Cross Reference | IDT74FCT162500T Schematic | IDT74FCT162500T Distributor |
| IDT74FCT162500T Application Notes | IDT74FCT162500T RoHS | IDT74FCT162500T Circuits | IDT74FCT162500T footprint |
