128k X 32 Synchronous Pipelined Static Ram

The ICSI IS61SP12832 is a high-speed, low-power synchro- nous static RAM designed to provide a burstable, high-perfor- mance, secondary cache for the Pentium, 680X0, and PowerPC Microprocessors It is organized as 131,072 words by 32 bits, fabricated with ICSI's advanced CMOS technology. The device integrates a 2-bit burst Counter high- speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through Registers controlled by a positive-edge-triggered single Clock input. Write cycles are internally self-timed and are initiated by the rising edge of the Clock input. Write cycles CAN be from one to four bytes wide as controlled by the write control inputs. By Unkown
IS61SP12832 's PackagesIS61SP12832 's pdf datasheet



IS61SP12832 Pinout, Pinouts
IS61SP12832 pinout,Pin out
This is one package pinout of IS61SP12832,If you need more pinouts please download IS61SP12832's pdf datasheet.

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