In-System Programmable High Density PLD

The ISPLSI3256A is a High-Density Programmable Logic Device containing 384 Registers 128 Universal I/O pins, five Dedicated Clock Input Pins, eight Output Routing Pools (ORP) and a Global Routing Pool (GRP) which allows complete inter-connectivity between all of these elements. The ISPLSI3256A features 5V in-system programmability and in-system diagnostic capabilities. The ISPLSI3256A offers non-volatile reprogrammability of the Logic as well as the interconnect to provide truly reconfigurable systems. The basic unit of Logic on the ISPLSI3256A device is the Twin Generic Logic Block (Twin GLB) labelled A0, A1...H3. There are a total of 32 Twin GLBs in the ISPLSI3256A device. Each Twin GLB has 24 inputs, a programmable AND array and two OR/Exclusive-OR Arrays, and eight outputs which CAN be configured to be either combinato- rial or registered. All Twin GLB inputs come from the GRP. By Lattice Semiconductor Corp.
ISPLSI3256A 's PackagesISPLSI3256A 's pdf datasheet
ISPLSI3256A-90LM MQFP
ISPLSI3256A-90LQ PQFP
ISPLSI3256A-70LM MQFP
ISPLSI3256A-70LQ PQFP
ISPLSI3256A-50LM MQFP
ISPLSI3256A-70LQI PQFP
ISPLSI3256A-50LMI MQFP




ISPLSI3256A Pinout, Pinouts
ISPLSI3256A pinout,Pin out
This is one package pinout of ISPLSI3256A,If you need more pinouts please download ISPLSI3256A's pdf datasheet.

ISPLSI3256A circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

Related Electronics Part Number

Related Keywords:

ISPLSI3256A Pb-Free ISPLSI3256A Cross Reference ISPLSI3256A Schematic ISPLSI3256A Distributor
ISPLSI3256A Application Notes ISPLSI3256A RoHS ISPLSI3256A Circuits ISPLSI3256A footprint
Hot categories