Dual JK Flip-Flop

The IW4027B is a Dual JK Flip-Flop which is edge-triggered and features independent Set, Reset, and Clock inputs. Data is accepted when the Clock is LOW and transferred to the output on the positive- going edge of the Clock The active HIGH asynchronous Reset and Set are independent and override the J, K, or Clock inputs. The outputs are buffered for best system performance. By Integral Corp.
IW4027B 's PackagesIW4027B 's pdf datasheet

IW4027B Pinout, Pinouts
IW4027B pinout,Pin out
This is one package pinout of IW4027B,If you need more pinouts please download IW4027B's pdf datasheet.

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