Mobile Sdram Semiconductor

The K4S513233F is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 32 bits, fabricated with SAMSUNGs high performance CMOS technol- ogy. Synchronous design allows precise cycle control with the use of system Clock and I/O transactions are possible on every Clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device to be useful for a variety of high bandwidth and high per- formance memory system applications. By Samsung Semiconductor, Inc.
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K4S513233F circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

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