256Mb I-die DDR2 SDRAM SpecificationThe 256Mb DDR2 SDRAM is organized as a 4Mbit x 16 I/Os x 4
banks device. This synchronous device achieves high speed dou-
ble-data-rate transfer rates of up to 800Mb/sec/pin (DDR2-800) for
general applications.
The chip is designed to comply with the following key DDR2
SDRAM features such as posted CAS with additive latency, write
latency = read latency -1, Off-Chip Driver(OCD) impedance
adjustment and On Die Termination. By Samsung Semiconductor, Inc.
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| K4T56163QI Pb-Free | K4T56163QI Cross Reference | K4T56163QI Schematic | K4T56163QI Distributor |
| K4T56163QI Application Notes | K4T56163QI RoHS | K4T56163QI Circuits | K4T56163QI footprint |
