256kx36 & 512kx18 Flow-through Ntram Tm

The K7M803625A and K7M801825A are 9,437,184-bit Syn- chronous Static SRAMs The NtRAMTM, or No Turnaround Random Access Memory uti- lizes all bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except output enable and linear burst order are synchronized to input Clock Burst order control must be tied "High or Low". Asynchronous inputs include the sleep mode enable(ZZ). Output Enable controls the outputs at any given time. Write cycles are internally self-timed and initiated by the rising edge of the Clock input. This feature eliminates complex off-chip write pulse generation and provides increased Timing flexibility for incoming signals. For read cycles, Flow-Through SRAM allows output data to simply flow freely from the memory array. The K7M803625A and K7M801825A are implemented with SAMSUNGs high performance CMOS technology and is avail- able in 100pin TQFP and 119BGA packages. Multiple power and ground pins minimize ground bounce. By Samsung Semiconductor, Inc.
K7M801825A 's PackagesK7M801825A 's pdf datasheet

K7M801825A Pinout, Pinouts
K7M801825A pinout,Pin out
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