Presettable 4-bit Binary Up/down Counter High-speed Silicon-gate CmosThe KK74AC193 is identical in pinout to the LS/ALS193,
HC/HCT193. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LS/ALS outputs.
The Counter has two separate Clock inputs, a Count Up Clock and
Count Down Clock inputs. The direction of counting is determined by
which input is clocked. The outputs change state synchronous with the
LOW-to-HIGH transitions on the Clock inputs. This Counter may be
preset by entering the desired data on the P0, P1, P2, P3 input. When the
Parallel Load input is taken low the data is loaded independently of either
Clock input. This feature allows the Counters to be used as devide-by-n by
modifying the count lenght with the preset inputs. In addition the Counter
CAN also be cleared. This is accomplished by inputting a high on the
Master Reset input. All 4 internal stages are set to low independently of
either Clock input.Both a Terminal Count Down (TCD) and Terminal
Count Up (TCU) Outputs are provided to enable cascading of both up and
down counting functions. The TCD output produces a negative going
pulse when the Counter underflows and TCU outputs a pulse when the
Counter overflows. The Counter CAN be cascaded by connecting the TCU
and TCD outputs of one device to the Count Up Clock and Count Down
Clock inputs, respectively, of the next device. By Kodenshi Korea Corp.
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KK74AC193 Pb-Free | KK74AC193 Cross Reference | KK74AC193 Schematic | KK74AC193 Distributor |
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