Octal D Flip-flop With Common Clock And Reset

The KK74LV273 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC/HCT273. The KK74LV273 has eight edge-triggered, D-type Flip-Flops with individual D inputs and Q outputs. The common Clock (CP) and master reset (MR) inputs load and reset (clear) all Flip-Flops simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH Clock transition, is transferred to the corresponding output (Qn) of the Flip-Flop All outputs will be forced LOW independently of Clock or data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and master reset are common to all storage elements. By Kodenshi Korea Corp.