11 X 10-bit Image Filter

The LF2246 consists of an array of four 11 x 10-bit registered multipliers followed by a summer and a 25-bit accumulator. All multiplier inputs are user accessible and CAN be up- dated every Clock cycle with either fractional or integer twos comple- ment data. The pipelined architecture has fully registered input and output ports and an asynchronous three-state output enable control to simplify the design of complex systems. The pipeline latency for all inputs is five Clock cycles. Storage for mixing and filtering coefficients CAN be accomplished by holding the data or coefficient inputs over multiple Clock cycles. A 25-bit accumulator path allows cumulative word growth which may be internally rounded to 16 bits. Output data is updated every Clock cycle and may be held under user control. All inputs, By LOGIC Devices Incorporated
LF2246 's PackagesLF2246 's pdf datasheet

LF2246 Pinout, Pinouts
LF2246 pinout,Pin out
This is one package pinout of LF2246,If you need more pinouts please download LF2246's pdf datasheet.

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