12-Mbit Frame Buffer / FIFO

The LF3312 is a 12,441,600-bit memory device which CAN be confgured by the user into either a two- data-port single-channel or a four-data-port dual-channel architecture. The input data ports may be clocked simultaneously or asynchronously with one another and with the output ports. Using the four 12-bit data ports provided, the user CAN operate the chip as one or two 8, 10, or 12-bit channels or as a single 16, 20, or 24-bit channel, without wasting any memory resources. Since reads are non-destructive, a given data value, once written into the memory core, may be read as many times as desired. A user requiring more storage CAN cascade up to sixteen LF3312s into a larger array. A great deal of memory addressing fexibility is offered with the LF3312. In addition to simple clearing of the Write and Read pointers, either pointer may be set/jumped to any location within the entire address space. Real-time random-access Writing or Reading is also supported through an external address port. By LOGIC Devices Incorporated
LF3312 's PackagesLF3312 's pdf datasheet

LF3312 Pinout, Pinouts
LF3312 pinout,Pin out
This is one package pinout of LF3312,If you need more pinouts please download LF3312's pdf datasheet.

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