24Mbit Frame Buffer / FIFO

The LF3324 is a 24 Mbit memory device that handles 8, 10, or 12bit data. The input data port may be clocked asynchronously to the output ports. Since reads are non-destructive, a given data value, once written into the memory core, may be read as many times as desired. A user requiring more storage CAN cascade up to eight LF3324s into a larger array. A great deal of memory addressing fexibility is offered with the LF3324. Both Burst Mode and Random Access addressing is possible. In addition to simple clearing of the Write and Read pointers, either pointer may be set/jumped to any location within the entire address space. Real-time random-access Writing or Reading is also supported through an external address port. By LOGIC Devices Incorporated
LF3324 's PackagesLF3324 's pdf datasheet



LF3324 Pinout, Pinouts
LF3324 pinout,Pin out
This is one package pinout of LF3324,If you need more pinouts please download LF3324's pdf datasheet.

LF3324 circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

Related Electronics Part Number

Related Keywords:

LF3324 Pb-Free LF3324 Cross Reference LF3324 Schematic LF3324 Distributor
LF3324 Application Notes LF3324 RoHS LF3324 Circuits LF3324 footprint
Hot categories