Low Power Phase-Locked Loop
The LMC568 is an amplitude-linear phase-locked loop consisting of a linear VCO fully balanced phase detectors, and a Carrier detect output. LMCMOS? technology is employed for high performance with low power consumption.
The VCO has a linearized control range of 30% to allow demodulation of FM and FSK signals. Carrier detect is indicated when the PLL is locked to an input signal greater than 26 mVrms. LMC568 applications include FM SCA and TV second Audio program decoders, FSK data Demodulators and voice pagers.
By National Semiconductor Corporation
|LMC568CMX/NOPB||Texas Instruments||IC PHASE LOCKED LOOP, PDSO8, M08A, PLL or Frequency Synthesis Circuit|
|LMC568CM/NOPB||Texas Instruments||IC PHASE LOCKED LOOP, PDSO8, SO-8, PLL or Frequency Synthesis Circuit|
|LMC568 Pb-Free||LMC568 Cross Reference||LMC568 Schematic||LMC568 Distributor|
|LMC568 Application Notes||LMC568 RoHS||LMC568 Circuits||LMC568 footprint|