The LS7566R consists of four identical modules of 24-bit pro- grammable Counters with direct Interface to incremental encod- ers. The modules CAN be configured to operate as quadrature- Clock Counters or non-quadrature up/down Counters In both quadrature and non-quadrature modes, the modules CAN be fur- ther configured into free-running, non-recycle, modulo-n and range-limit count modes. The mode configuration is made through two 8-bit read/write addressable control Registers MDR0 and MDR1. Data CAN be ported to a 24-bit preset Register PR, or- ganized in directly addressable (write-only) byte0 [PR0], byte1 [PR1] and byte2 [PR2] segments. PR CAN be transferred to the 24-bit Counter CNTR, either by instruction to CMR or by hard- ware input control. A 24-bit digital Comparator perpetually checks for the equality of the CNTR and the PR and CAN be used to set an output flag when the equality occurs. For reading the CNTR, its instantaneous value CAN be transferred to a 24-bit output latch OL, either by instruction to CMR or by hardware input control. The OL in turn CAN be read in directly addressable (read-only) byte0 [OL0], byte1 [OL1] and byte2 [OL2] segments. An address- able (read-only) Octal status Register STR, stores the count re- lated status information such as CNTR overflow, underflow, count direction, etc. Data Communication for read/write is per- formed through an Octal 3-state parallel I/O bus. By LSI Computer Systems, Inc.
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LS7566R Pinout, Pinouts
LS7566R pinout,Pin out
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