32-BIT SINGLE- AXIS/DUAL-AXIS QUADRATURE COUNTER

The LS7766 consists of two identical modules of 32-bit programmable up/down Counters (CNTR) with direct Interface to incremental encod- ers. The modules CAN be configured to operate as quadrature-clock Counters or non-quadrature up/down Counters In both quadrature and non-quadrature modes, the modules CAN be further configured into free-running, non-recycle, modulo-n and range-limit count modes. The mode configuration is made via two octal read/write addressable mode control Registers MCR0 and MCR1. Data CAN be written into a 32-bit input data Register (IDR), organized in addressable Word seg- ments using the hex IO bus or in byte segments using the octal IO Bus. The IDR CAN be used to store target encoder positions and com- pared with the CNTR for generating marker flags when the CNTR reaches the target value. A 32-bit digital Comparator is included for monitoring the equality of the CNTR to the IDR. Snapshots of the CNTR value CAN be stored in a read-addressable 32-bit output data Register (ODR). The ODR CAN be read in Word segments or byte seg- ments in accordance with the selected bus width. Data transfers among the Registers and various Register reset functions are per- formed by means of a write-addressable octal transfer control Register (TCR). A read-addressable octal status Register (STR), stores the count related status information such as CNTR overflow, underflow, count direction, etc. By LSI Computer Systems, Inc.
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LS7766 Pinout, Pinouts
LS7766 pinout,Pin out
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