128 Mbit (8mb X16, Multiple Bank, Multi-level, Burst), 1.8v Supply Flash Memory

The M30L0R7000T0 M30L0R7000B0 is a 128 Mbit (8Mbit x16) non-volatile Flash memory that may be erased electrically at block level and programmed in-sys- tem on a Word-by-Word basis using a 1.7V to 2.0V VDD supply for the circuitry and a 1.7V to 2.0V VDDQ supply for the Input/Output pins. An optional 9V VPP power supply is provided to speed up fac- tory programming. The device features an asymmetrical block archi- tecture and is based on a multi-level cell technolo- gy. M30L0R7000T0 M30L0R7000B0 has an array of 131 blocks, and is divided into 8 Mbit banks. There are 15 banks each containing 8 main blocks of 64 KWords, and one parameter bank containing 4 pa- rameter blocks of 16 KWords and 7 main blocks of 64 KWords. The Multiple Bank Architecture allows Dual Operations, while programming or erasing in one bank, read operations are possible in other banks. Only one bank at a time is allowed to be in program or erase mode. It is possible to perform burst reads that cross bank boundaries. The bank architecture is summarized in Table 2., and the memory maps are shown in Figure 4. The Param- eter Blocks are located at the top of the memory address space for the M30L0R7000T0 and at the bottom for the M30L0R7000B0. Each block CAN be erased separately. Erase CAN be suspended, in order to perform program in any other block, and then resumed. Program CAN be suspended to read data in any other block and then resumed. Each block CAN be programmed and erased over 100,000 cycles using the supply voltage VDD. There is a Buffer Enhanced Factory programming command available to speed up pro- gramming. By STMicroelectronics
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M30L0R7000B0 Pinout, Pinouts
M30L0R7000B0 pinout,Pin out
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